The subject matter of this application is directed to a relaxation oscillator, and more particularly to a chopped relaxation oscillator with local comparator biasing.
FIG. 1 illustrates processes involved in a signal sampling system 100 that includes a signal source 110 and a sample and hold (“S/H”) circuit 120. The signal source 110 generates a continuous time signal such as the signal illustrated in FIG. 1(b). The S/H circuit 120 may sample the input signal at times as determined by a driving clock signal CLK. Typically, the sampling times are determined by rising and/or falling edges of the CLK signal. The S/H circuit 120 holds the sampled signal value for processing by other circuits within the system, for example, an analog-to-digital converter 130, until the CLK signal defines another sampling instant. For the input signal shown in FIG. 1(b), the S/H circuit 120 might generate an output signal as shown in FIG. 1(c).
Ideally, the CLK signal defines sampling events that occur at precisely defined intervals that are uniformly spaced. The CLK signal may be generated by an oscillator (e.g., a relaxation oscillator that uses charge and discharge time of a capacitor). However, random processes that exist within practical implementations will move these sampling instances. This error is referred to as phase noise.
The uncertainty in the absolute time of any edge coming out of a clock source is the sum of all the uncertainties in the clock periods that provide this edge. Any error source that modifies a period of the clock source will be integrated when considering the absolute timebase accuracy. If a sinusoid is sampled with the signal sampling system 100, then in the frequency domain the sampled signal will be smeared by the uncertainty of the timebase. While most of the smeared energy will be found near the ideal location of the energy, some of the smeared energy will be further away from the ideal location. Error sources having more energy at low frequencies, will introduce more uncertainty in the timebase at low frequencies and will increase the sinusoidal smearing. Reducing these low frequency error sources would provide better on chip clock sources.
Accordingly, there is a need in the art for relaxation oscillators that reduce the phase noise.